An integrated circuit may contain a planar extended drain metal oxide semiconductor (MOS) transistor with a buried drift region, for example to provide an operating voltage above the dielectric strength of the gate dielectric layer in the MOS transistor. It may be desirable to form a low resistance drain end connection between the buried drift region and the drain contact, while it may be desirable to form a lightly doped channel end link between the buried drift region and the channel of the MOS transistor. It may further be desirable to minimize the number of photolithographic and ion implant operations in the fabrication sequence of forming the integrated circuit.